Professional Skills
- C, Rust, Python, C++
- RegEx, SQL
- Verilog/VHDL, Assembly (8086, MIPS)
- Linux, Zephyr, Bison
Others
- Driver's License
- Deep Learning (Tensorflow)
- Embedded Systems (Zephyr)
- Hardware Simulation
Foreign Languages
- English: C2 CEFR
- Spanish: Native
- Swedish: Basic
Hobbies
- Motorsports and Cars
- Films and Photography
- Cycling
- Technology
Contact
Work Experience
Simulation Software Engineer (Internship + Full Time) | SambaNova Systems
Stockholm, Sweden 🇸🇪 | Apr 2023 - Present- Internship (Apr 2023 - Aug 2023): Worked on compiler and simulator components
- Full Time (Jan 2024 - Present): Developed JIT compiler components for the RDU targeting ARM and x86 architectures
- Created a simulator of an abstract layer in the compiler for the RDU (Master Thesis)
- Coded hardware models from scratch to simulate chip behavior
- Fixed, supported, and maintained existing simulator models with regression, integration, and unit testing
- Ensured models are performant and correlate simulator with real hardware (memory, cycle correlation, hang debugging)
- Performance debugging: analyzed telemetry and statistics (HBM, SRAM, DRAM utilization, Compute usage, Dataflow configuration)
- Developed new framework tools to analyze executions in the simulator (telemetry analysis, chip component usage)
Software Developer | Oficina Nacional de Delitos de Odio | Part-time
Ministerio del Interior, Government of Spain 🇪🇸 | Jul 2021 - Jan 2023- Geoparsed, geolocalized, tabulated, and anonymized police reports for hate crime analysis
- Developed Named Entity Recognition pipelines using RegEx, FlairNLP, HuggingFace transformers, Tensorflow, BiLSTM+CRF, and BiGRU+CRF
- Built a desktop program using Google Places API, OpenStreetMaps Overpass API, PyQt5, pyinstaller, and Inno Setup
Education
Double Master's in Computer Science | 2022 - 2024
Uppsala University, Sweden (2022-2023) & National Taiwan Normal University, Taiwan (2023-2024)
Maximum grade in 9/11 courses, 2/11 near maximum
Verilog Project: Accelerating Neural Network in PS/PL and run on bare metal
VHDL Project: Implementation of a CPU architecture in an ALTERA DE1-SOC FPGA
Real-time systems in ADA | Programming Embedded Systems with Zephyr
Universidad Autónoma de Madrid | Sep 2018 - Jul 2022
Bachelor in Computer Science Engineering, 8 honorific mentions, 9.6/10 in final Bachelor Thesis, 4th of class
Conservatorio Arturo Soria | 2010 - 2014
Elementary Piano, which helped me not only with music, but to understand how to organize and face stage.
Coursera | University of Michigan | 2019 - 2020
SOCIAL